1. Field
This patent document relates to an address generation circuit and a memory device including the same.
2. Description of the Related Art
A memory cell of a memory device includes a transistor serving as a switch and a capacitor for storing an electric charge. According to the electric charge stored in the capacitor of the memory cell, that is, the terminal voltage of the capacitor, data may be determined to be high, corresponding to logic 1, or low, corresponding to logic 2.
Since data is retained in such a manner that electric charge is accumulated in the capacitor, no power is consumed in principle. However, since the initial electric charge stored in the capacitor is lost due to leakage current caused by a PN junction of a MOS transistor or the like, the data may be lost. To prevent such data loss, the data stored in the memory cell must be read and the capacitor must be recharged according to the read information before the data is lost. This operation must be periodically repeated to retain the data. Such a recharging operation is referred to as a refresh operation.
FIG. 1 is a circuit diagram illustrating a part of a cell array included in a memory device. FIG. 1 exemplarily shows the cell array including bit lines BL and 3 word lines WLK−1, WLK and WLK+1, disposed adjacently.
In the cell array of FIG. 1, WLK with HIGH_ACT represents a word line in which the active number or active frequency is high, and WLK−1 and WLK+1 represent word lines arranged adjacent to the word line WLK. Furthermore, CELL_K−1 CELL_K, and CELL_K−1 represent memory cells coupled to the word lines WLK−1, WLK, and WLK+1, respectively. The memory cells CELL_K−1, CELL_K, and CELL_K+1 include cell transistors TR_K−1, TR_K, and TR_K+1 and cell capacitors CAP_K−1, CAP_K, and CAP_K+1, respectively.
In FIG. 1, when the word line WLK is activated or precharged (deactivated), the voltages of the word lines WLK−1 and WLK+1 increase or decrease due to coupling between the word line WLK and the word lines WLK−1 and WLK+1 thereby affecting electric charges stored in the cell capacitors CAP_K−1 and CAP_K+1. Thus, when the word line WLK is frequently activated-precharged or frequently toggles between the active state and the precharge state, data stored in the memory cells CELL_K−1 and CELL_K+1 may be damaged due to a change in electric charges stored in the cell capacitors CAP_K−1 and CAP_K+1.
Furthermore, electromagnetic waves caused by the word line toggles between the active state and the precharge state may make electrons flow into or escape from the cell capacitors included in the memory cells coupled to the adjacent word lines, thereby damaging data of the memory cells.